Usually, there is a memory hierarchy in a computer system. Generally speaking, the memory hierarchy is composed of multi-level memories. The memory in a higher level of the memory hierarchy usually has the properties of higher speed, smaller size and lower latency than those in lower levels. Generally, “level one” registers are located in the proximity of the processor in a data processing system. “Level two” caches are lower than “level one” registers, but still in the proximity of the processor in the data processing system. “Level three” caches have capacities for storing more data, but needs longer time to access. Further, there can be random access memories (RAM), hard disk drivers, tape backups and the like below these three levels.
In existing computer systems, a traditional method to access a register in a register file is through the binary instruction or the assembly language. Such binary instructions have designated fields, called source/destination register indexes, for accessing explicitly to a register in the register file. When being encoded in a binary instruction format, register indexes are filled with binary instructions. When these instructions are loaded into the processor for executing, register indexes can not be changed. Thus, in such methods, register indexes are fixed. When programming in assembly language or high level languages (e.g., C language), compiling tools translate the code into the assemble language or high level languages into binary codes and fill the register index field. In this method, the codes access registers automatically through the register indexes designated statically. Such indexes and access manners for registers in the prior art result in many unnecessary overlapped memory accesses, and thus reducing the access speed of memories.
Moreover, none of instruction sets of any processors in the prior art has the instructions that access registers by using a source register as an index. However, such instructions are easily implemented and included in the existing instruction sets through additional simple hardware logic in existing pipeline according to the present invention.
There have been some methods and systems for accessing registers with indexes in the prior art. For example, a U.S. Pat. No. 5,995,727, titled “Method and Apparatus for Correlation of Events in a Distributed Multi-system Computing Environment”, has disclosed a monitoring method and apparatus, in which there has been disclosed a solution that indexes are used to access some words or bits in a certain register, rather than using contents in a register as an index so as to access other registers. As another example, a U.S. Pat. No. 5,875,483, titled “Completion Unit Register File Using Virtual Addresses with Qualify and Pseudo-Address Bits”, has mentioned an index of a register in a register file. However, the index is a traditional one, but not a value which uses contents of a register as an index to access other registers. There is still another example, a US Patent Application Serial No. 20060256854A1, which mentions a method for indexing registers in a single-instruction multiple-data processor. However, the operations of registers mentioned therein use new register numbers which can not be indexed by other registers, and further the method which uses contents of a register as an index to index other registers is not discussed.